Hybrid multiplier/CORDIC unit for online handwriting recognition
Citation:
McInerney, S. and Reilly, R.B. 'Hybrid multiplier/CORDIC unit for online handwriting recognition' in Proceedings of the IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP '99, March, 4, IEEE, 1999, pp 1909 - 1912.Download Item:
Abstract:
Traditionally online handwriting recognition (OHR) implementations use general-purpose processor architectures. The pre-processing step of OHR comprises regular array-based tasks such as normalisation, feature extraction and segmentation. Standard processor architectures cannot however efficiently support the varied arithmetic operations required by pre-processing. These tasks would seem ideally suited for custom hardware acceleration. CORDIC offers all the required elementary functions for pre-processing but is inefficient for linear mode operations (multiplication/division) due to its serial nature. A hybrid multiplier/CORDIC architecture is proposed in which a fast iterative multiplier/MAC shares hardware with a serial CORDIC unit. This multiplier retires 6b/cycle with minor additional hardware requirements. This hybrid offers improved general performance for signal-processing applications and is targeted at the pre-processing task of OHR. Performance results are included
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http://people.tcd.ie/reillyriDescription:
PUBLISHED
Author: REILLY, RICHARD
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IEEEType of material:
Conference PaperSeries/Report no:
4Availability:
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52264Metadata
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