FPGA implementation of an Image Segmentation algorithm using logarithmic arithmetic
Citation:
Bannister, R. Gregg, D. Wilson, S. Nisbet, A. `FPGA implementation of an Image Segmentation algorithm using logarithmic arithmetic? in Proceedings of the Midwest Symposium on Circuits and Systems, KY, 7-10 Aug, 2005, 2005, pp 810-813Download Item:
Abstract:
Image Segmentation is a process used in Computer
Vision to automatically divide up an image. We investigate the
suitability of FPGAs and Log Arithmetic for Image Processing.
We implemented a Bayesian pixel-based segmentation
algorithm in hardware, and found that certain portions of the
algorithm running on a mid-range FPGA could significantly
outperform an implementation running on a high-end PC.
Author's Homepage:
http://people.tcd.ie/swilsonDescription:
PUBLISHED
Author: GREGG, DAVID; WILSON, SIMON PAUL
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IEEEType of material:
Conference PaperCollections
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2005Availability:
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